330 Open source projects that are alternatives of or similar to soap

Bring Deep Learning to small devices

Compact FPGA game console

MIPI CSI-2 Camera Sensor Receiver verilog HDL implementation For any generic FPGA. Tested with IMX219 on Lattice MachXO3LF. 2Gbps UVC Video Stream Over USB 3.0 with Cypress FX3

SweRV EL2 Core

A curated collection of technical documentation for Arcades, Handhelds, Consoles, Computers and MCU’s.

The Antikernel operating system project

PlutoSDR Firmware

Example designs showing different ways to use SymbiFlow toolchains.

CNN acceleration on virtex-7 FPGA with verilog HDL

CAPCOM arcade hardware accurately replicated on MiST and MiSTer FPGA platforms. It covers Ghosts'n Goblins, 1942, 1943, Commando, F1-Dream, GunSmoke, Tiger Road, Black Tiger, Bionic Commando, Higemaru, Street Fighter and Vulgus.

Build Customized FPGA Implementations for Vivado

High throughput JPEG decoder in Verilog for FPGA

Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.

HLS branch of Halide

Space Invaders game implemented with VHDL

FPGA 101 - Workshop materials

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

A mixed signal netlist language (pre-alpha)

All open source file and project for OpenFPGAduino project

SPI master and slave for FPGA written in VHDL

A curated list of awesome open source hardware design tools

Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe

LicheeTang 蜂鸟E203 Core

A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm

80186 compatible SystemVerilog CPU core and FPGA reference design

🤖 SoCFPGA: Open Source embedded Linux developed for Intel (ALTERA) SoC-FPGAs (Cyclone V & Arria 10)

Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.

Retro Z80 computer for the Pano Logic Thin Client

720p FPGA Media Player (RISC-V + Motion JPEG + SD + HDMI on an Artix 7)

Image Processing Toolbox in Verilog using Basys3 FPGA

A collection of extensions for Vivado HLS and Intel FPGA OpenCL to improve developer quality of life.

❄️ Visual editor for open FPGA boards

Notes on the Red Pitaya Open Source Instrument

A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems

Tool to generate register RTL, models, and docs using SystemRDL or JSpec input

Automatic GPU, TPU, FPGA, Xeon Phi, Multithreaded, Distributed, etc. offloading for scientific machine learning (SciML) and differential equations

Tools for running FPGA vendor toolchains with Docker

Simple, orthogonal 32-bit computer architecture and environment

a simple and cheap vector network analyzer, including support software

An OpenCL-based FPGA Accelerator for Convolutional Neural Networks

Verilog Generator of Neural Net Digit Detector for FPGA

Scala based HDL

Connectal is a framework for software-driven hardware development.

Multi-platform high performance deep learning inference engine (『飞桨』多平台高性能深度学习预测引擎）

KianRISC-V! No RISC-V, no fun! RISC-V CPU with strong design rules and unittested! CPU you can trust! kianv rv32im risc-v a hdmi soc with harris computer architecture in verilog: multicycle, singlecycle and 5-stage pipelining Processor. Multicycle Soc with firmware that runs raytracer, mandelbrot, 3d hdmi gfx, dma controller, etc.....

Package manager and build abstraction tool for FPGA/ASIC development

An Open Source Deep Learning Inference Engine Based on FPGA

The USRP™ Hardware Driver Repository

FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)

John the Ripper jumbo - advanced offline password cracker, which supports hundreds of hash and cipher types, and runs on many operating systems, CPUs, GPUs, and even some FPGAs

A utility for Composing FPGA designs from Peripherals

collection of works aiming at reducing model sizes or the ASIC/FPGA accelerator for machine learning

Must-have verilog systemverilog modules

TornadoVM: A practical and efficient heterogeneous programming framework for managed languages

Bus bridges and other odds and ends

A small and customizable full-scale 32-bit RISC-V soft-core CPU and SoC written in platform-independent VHDL.

Portable games console, designed from scratch: CPU, graphics, PCB, and the kitchen sink

FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian10 Images (for Xilinx:Zynq-Zybo:PYNQ-Z1 Altera:de0-nano-soc)

Sturdy is a library for developing sound static analyses in Haskell.

A re-creation of a Cosmac ELF computer, Coded in SpinalHDL