320 Open source projects that are alternatives of or similar to up5k

Lattice iCE40: development platform for PlatformIO

IceChips is a library of all common discrete logic devices in Verilog

CaribouLite turns any 40-pin Raspberry-Pi into a Tx/Rx 6GHz SDR

Scripts to build and use docker images including GHDL

Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm

A low cost FPGA development board for absolute newbies

Mostly AVR compatible FPGA soft-core

FPGA core for SHA256d mining targeting Lattice iCE40 devices.

Sphinx Extension which generates various types of diagrams from Verilog code.

Small Processing Unit 32: A compact RV32I CPU written in Verilog

Project X-Ray Database: XC7 Series

FPGA Assembly (FASM) Parser and Generator

A hardware implementation of CNN, written by Verilog and synthesized on FPGA

Unofficial Yosys WebAssembly packages

iCE40 floorplan viewer

CMU 18545 FPGA project -- Multi-channel ultrasound data acquisition and beamforming system.

A flexible framework for analyzing and transforming FPGA netlists. Official repository.

FOSS Flow For FPGA

The Task Parallel System Composer (TaPaSCo)

shdl6800: A 6800 processor written in SpinalHDL

This repository contains iCEBreaker examples for Amaranth HDL.

P4-14/16 Bluespec Compiler

hBPF = eBPF in hardware

This repo is for ECE44x (Fall2015-Spring2016)

Generator of verilog description for FPGA MobileNet implementation

VHDL project to run a simple 8-bit computer very similar to the one built by Ben Eater (see https://eater.net)

Cross EDA Abstraction and Automation

MOS6581 SID chip emulator in SystemVerilog

Verilog FPGA Parts Library. Old Octavo soft-CPU project.

Clash implementation of the Compucolor II home computer

Materials for "Introduction to FPGA and Verilog" at MIPT DREC

HDMI Out VHDL code for 7-series Xilinx FPGAs

This project demonstrates DSP capabilities of Terasic DE2-115

Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4, on a Xilinx FPGA

Binary Neural Network on IceStick FPGA.

High-speed LaserDisc RF sampler

Random ideas and interesting ideas for things we hope to eventually do.

SystemOT, yet another home brew cpu.

Programmable multichannel ADPCM decoder for FPGA

Framework providing operating system abstractions and a range of shared networking (RDMA, TCP/IP) and memory services to common modern heterogeneous platforms.

A programming language for FPGAs.

Intel 8080-based Space Invaders arcade machine implemented on an FPGA, written in CLaSH

👇 Add capacitive touch buttons to any FPGA!

A Vivado HLS Command Line Helper Tool

Dockerfile with Vivado for CI

DMA attacks over PCI Express based on Xilinx Zynq-7000 series SoC

SneakySnake🐍 is the first and the only pre-alignment filtering algorithm that works efficiently and fast on modern CPU, FPGA, and GPU architectures. It greatly (by more than two orders of magnitude) expedites sequence alignment calculation for both short and long reads. Described in the Bioinformatics (2020) by Alser et al. https://arxiv.org/abs…

Kansas Lava implementation of MOS 6502 microprocessor

Yet Another Tetris on FPGA Implementation

【原创，已被编入官方教材】Three-level storage subsystem(SD+DDR2 SDRAM+Cache), based on Nexys4 FPGA board. 同济大学计算机系统结构课程设计，FPGA三级存储子系统。

Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware

Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

Virtio implementation in SystemVerilog

SHA-256 IP core for ZedBoard (Zynq SoC)

🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.

RISC-V Cores, SoC platforms and SoCs

Polyphony is Python based High-Level Synthesis compiler.

Small-scale Tensor Processing Unit built on an FPGA

Schematic symbol libraries for FPGAs & microcontrollers.