Top 626 Verilog open source projects

Notary: A Device for Secure Transaction Approval 📟

round robin arbiter

Virtual Development Board

Design, Documentation, Schematic, Board, Code files for the FPGA Oscilloscope project using an Altera Cyclone III FPGA.

Mips处理器仿真设计

2017级北航计算机学院计算机组成原理课程设计(MIPS CPU)

Capcom System 1/1.5/2 compatible verilog core for FPGA

A CPU on an FPGA that you can play Zork on

Pipeline CPU of MIPS architecture with L1 Data Cache by Verilog

Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for FPGA development.

This project is an open-source In-Circuit Emulator for the 6502, 65C02, Z80, 6809 and 6809E 8-bit processors. See:

A Sound Blaster compatible sound card for Micro Channel bus computers

achieve softmax in PYNQ with heterogeneous computing.

ECE 5745 Tutorial 5: Synopsys/Cadence ASIC Tools

SPI flash MITM and emulation (QSPI is a WIP)

Xilinx Hackathon 2017

Cycle-Accurate MC6809/E implementation, Verilog

IEEE 754 floating point unit in Verilog

a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog

Adding PR to the PYNQ Overlay

Verilog for the Bus Pirate Ultra FPGA

AGM bitstream utilities and decoded files from Supra

A collection of little open source FPGA hobby projects

Moxie-compatible core repository

Verilog configurable cache

Revengineered ancient PDP-11 CPUs, originals and clones

CPOL=0, CPHA=0 SPI core for practicing formal verification with yosys

Fully parametrizable combinatorial parallel LFSR/CRC module

这是我所开发的两个项目，包括ov5640-ddr3-usb2.0高速图像采集系统以及NOIP1SN1300A-ddr3-sdhc高速地表图像采集及存储系统

IBM PC Compatible SoC for a commercially available FPGA board

🏫 存放一些 杭电 的文件

Labs to learn SpinalHDL

Implementation of BESM-6 clone in Verilog

A collection of codes, articles and courses material by ccc

A place to share libraries and utilities that don't belong in the core bsc repo

USB3 PIPE interface for Xilinx 7-Series

Firmware that implements a reliable high-performance control link for particle physics electronics, based on the IPbus protocol

No description, website, or topics provided.

(RETIRED see https://github.com/analogdevicesinc/hdl instead) FPGA interface reference designs for Analog Devices mixed signal IC products

Transient Array Radio Telescope

FPGA-based LPC bus sniffing tool for Lattice iCEstick Evaluation Kit

PCIe library for the Xilinx 7 series FPGAs in the Bluespec language

Sharp X68000 for MiSTer

A crazy small 8-bit CPU built with only seventeen 7400-series chips.

Example LED blinking project for your FPGA dev board of choice

TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerators.

A pipeline CPU in Verilog for the Y86 instruction set.

RISC-V processor

INT8 & FP16 multiplier accumulator (MAC) design with UVM verification completed.

Very Naive MIPS CPU using Clash