574 Open source projects that are alternatives of or similar to Cores Swerv El2

Tutorial on how to build Docker Images for the IAR Build Tools on Linux hosts. The IAR Build Tools on Linux are available for Arm, RISC-V and Renesas (RH850, RL78 and RX).

Haskell library for hardware description

FPGA-based JPEG-LS image compressor.

Various HDL (Verilog) IP Cores

Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.

MDEPX — A BSD-style RTOS

Nuclei Microcontroller Software Interface Standard Development Repo

Maxine VM: A meta-circular research VM

A FPGA friendly 32 bit RISC-V CPU implementation

PlatformIO is a professional collaborative platform for embedded development 👽 A place where Developers and Teams have true Freedom! No more vendor lock-in!

A self-hosting and educational C compiler

A re-creation of a Cosmac ELF computer, Coded in SpinalHDL

The OpenPiton Platform

Self-hosting metacompiled Forth, bootstrapping from a few lines of C; targets Linux, Windows, ARM, RISC-V, 68000, PDP-11, asm.js.

OpenEmbedded/Yocto layer for RISC-V Architecture

Simple RISC-V 3-stage Pipeline in Chisel

A simple RISC-V processor for use in FPGA designs.

Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel

Portable games console, designed from scratch: CPU, graphics, PCB, and the kitchen sink

CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.

Rocket Chip Generator

32-bit RISC-V system on chip for iCE40 and ECP5 FPGAs

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

Shakti: development platform for PlatformIO

Verilog FPGA Parts Library. Old Octavo soft-CPU project.

⛔ DEPRECATED ⛔ HERO Software Development Kit

RISC-V CPU Core (RV32IM)

Repository for basic (and not so basic) Verilog blocks with high re-use potential

RISC-V Assembler and Runtime Simulator

CoreFreq is a CPU monitoring software designed for the 64-bits Processors.

PlatformIO IDE for VSCode: The next generation integrated development environment for IoT

RT-Thread is an open source IoT operating system.

Riscy-SoC is SoC based on RISC-V CPU core, designed in Verilog

A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm

Salamandra is a tool to find spy microphones that use radio freq to transmit. It uses SDR.

Multi-platform high performance deep learning inference engine (『飞桨』多平台高性能深度学习预测引擎）

Human Resource Machine - CPU Design #HRM

A small, light weight, RISC CPU soft core

🌍 Map location picker component for Android. Based on Google Maps. An alternative to Google Place Picker.

Caffe to VHDL

🤖 SoCFPGA: Open Source embedded Linux developed for Intel (ALTERA) SoC-FPGAs (Cyclone V & Arria 10)

Package manager and build abstraction tool for FPGA/ASIC development

A graphical processor simulator and assembly editor for the RISC-V ISA

Featherweight RISC-V implementation

Mixin is a trait/mixin and bytecode weaving framework for Java using ASM

Riscy Processors - Open-Sourced RISC-V Processors

Veluxi Vue.js Starter Project with Nuxt JS and Vuetify

The USRP™ Hardware Driver Repository

Capstone disassembly/disassembler framework: Core (Arm, Arm64, BPF, EVM, M68K, M680X, MOS65xx, Mips, PPC, RISCV, Sparc, SystemZ, TMS320C64x, Web Assembly, X86, X86_64, XCore) + bindings.

A MIPS CPU implemented in Verilog

Send video/audio over HDMI on an FPGA

The Antikernel operating system project

CAPCOM arcade hardware accurately replicated on MiST and MiSTer FPGA platforms. It covers Ghosts'n Goblins, 1942, 1943, Commando, F1-Dream, GunSmoke, Tiger Road, Black Tiger, Bionic Commando, Higemaru, Street Fighter and Vulgus.

Renode - Antmicro's virtual development framework for complex embedded systems

Rust's hardware abstract layer (HAL) for K210 chip, a dual RV64GC SoC with hardware accelerated AI peripherals. Contributions welcomed!

John the Ripper jumbo - advanced offline password cracker, which supports hundreds of hash and cipher types, and runs on many operating systems, CPUs, GPUs, and even some FPGAs

A refreshed Python toolbox for building complex digital hardware

Lightweight Java wrapper around JQ, a flexible JSON processor available for multiple platforms

The Eclipse Embedded CDT plug-ins for Arm & RISC-V C/C++ developers (formerly known as the GNU MCU Eclipse plug-ins). Includes the archive of previous plug-ins versions, as Releases.

collection of works aiming at reducing model sizes or the ASIC/FPGA accelerator for machine learning