950 Open source projects that are alternatives of or similar to Deep-DarkFantasy

mirror of https://git.elphel.com/Elphel/eddr3

open-source IEEE 802.11 WiFi baseband FPGA (chip) design

Virtio implementation in SystemVerilog

Vivado and PetaLinux projects for Zynq EBAZ4205 Board

SHA-256 IP core for ZedBoard (Zynq SoC)

DMA source and sink blocks for Xilinx Zynq FPGAs

Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.

Simple and fun dark-mode detection. JavaScript with a user mode toggle.

Dockerfile with Vivado for CI

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

DMA attacks over PCI Express based on Xilinx Zynq-7000 series SoC

NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.

Tools for running FPGA vendor toolchains with Docker

Materials for "Introduction to FPGA and Verilog" at MIPT DREC

Lattice iCE40: development platform for PlatformIO

FPGA core for SHA256d mining targeting Lattice iCE40 devices.

Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)

Hardware definition library and environment for designing and building digital hardware for FPGAs, using only open source tools

Wishbone controlled I2C controllers

Sphinx Extension which generates various types of diagrams from Verilog code.

Easily switch from light to dark theme, or the other way around, in Windows 10/11.

Generator of verilog description for FPGA MobileNet implementation

SpinalHDL - Cryptography libraries

PDP-6 Emulator

MOS6581 SID chip emulator in SystemVerilog

FPGA-based JPEG-LS image compressor.

Visual Studio 2019 Dark Theme for Notepad++

Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm

Firefox extension (WebExtensions)

Programmable multichannel ADPCM decoder for FPGA

A hardware implementation of CNN, written by Verilog and synthesized on FPGA

A programming language for FPGAs.

Small Processing Unit 32: A compact RV32I CPU written in Verilog

Cross EDA Abstraction and Automation

Dark Mode - Chrome extension. Relax your eyes at night and day.

Stylesheet and scripts for implementing dark mode with Bootstrap 4

Generate a dark mode version of any Sketch document, the right way.

222. Dark mode. Everywhere. 222 bytes of js to make any website dark

An Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.

Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack

NN on FPGA

Nozha is a rtl / ltr Admin Panel with Dark Mode

A configurable C++ generator of pipelined Verilog FFT cores

Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images

FPGA Verilog implementation of 1949 EDSAC Computer with animated tape reader, panel, teleprinter and CRT scope

Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for FPGA development.

List of ideas for getting started with TimVideos projects

Web-based dashboard interface to inspect Raspberry Pi hardware and software with no extra software required.

📡 Using Software Designed Radio to transmit MIMO-OFDM QPSK signals at 5 GHz

VHDL/Verilog/SystemC code generator, simulator API written in python/c++

Vim plugin to aid VHDL development (for LSP, see https://github.com/suoto/hdl_checker)

A sample app for iOS and Android written in Xamarin.Forms showing how to implement a Splash Page for Dark Mode

A FPGA implementation of the NTP and NTS protocols

A modern and customizable python UI-library based on Tkinter

A JSON library implemented in VHDL.

A full-speed device-side USB peripheral core written in Verilog.

A minimal dark vscode theme inspired by Hashnode blog syntax highlighting.

适用于iOS深色模式的令人愉快的主题框架

Chrome extension

Yet Another Tetris on FPGA Implementation