316 Open source projects that are alternatives of or similar to FPGA-CNN

A programming language for FPGAs.

Hands-on experience using the Vitis unified software platform with Xilinx FPGA hardware

No-MMU Linux capable RISC-V SoC designed to be useful.

shdl6800: A 6800 processor written in SpinalHDL

A re-creation of a Cosmac ELF computer, Coded in SpinalHDL

SneakySnake🐍 is the first and the only pre-alignment filtering algorithm that works efficiently and fast on modern CPU, FPGA, and GPU architectures. It greatly (by more than two orders of magnitude) expedites sequence alignment calculation for both short and long reads. Described in the Bioinformatics (2020) by Alser et al. https://arxiv.org/abs…

DMA attacks over PCI Express based on Xilinx Zynq-7000 series SoC

MOS6581 SID chip emulator in SystemVerilog

Small-scale Tensor Processing Unit built on an FPGA

Lattice iCE40: development platform for PlatformIO

The Task Parallel System Composer (TaPaSCo)

Fixed point package for Python.

VHDL project to run a simple 8-bit computer very similar to the one built by Ben Eater (see https://eater.net)

Programmable multichannel ADPCM decoder for FPGA

Schematic symbol libraries for FPGAs & microcontrollers.

👇 Add capacitive touch buttons to any FPGA!

Virtio implementation in SystemVerilog

Yet Another Tetris on FPGA Implementation

SystemOT, yet another home brew cpu.

🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.

Hardware definition library and environment for designing and building digital hardware for FPGAs, using only open source tools

🎯 soap - Structural Optimisation of Arithmetic Programs

HDMI Out VHDL code for 7-series Xilinx FPGAs

Managed Machine Learning Systems and Internet of Things Live Lesson

iCE40 floorplan viewer

This project demonstrates DSP capabilities of Terasic DE2-115

A curated collection of technical documentation for Arcades, Handhelds, Consoles, Computers and MCU’s.

Sphinx Extension which generates various types of diagrams from Verilog code.

Binary Neural Network on IceStick FPGA.

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

P4-14/16 Bluespec Compiler

A Vivado HLS Command Line Helper Tool

hBPF = eBPF in hardware

A flexible framework for analyzing and transforming FPGA netlists. Official repository.

Cross EDA Abstraction and Automation

Small Processing Unit 32: A compact RV32I CPU written in Verilog

Framework providing operating system abstractions and a range of shared networking (RDMA, TCP/IP) and memory services to common modern heterogeneous platforms.

An Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.

Kansas Lava implementation of MOS 6502 microprocessor

RISC-V Cores, SoC platforms and SoCs

【原创，已被编入官方教材】Three-level storage subsystem(SD+DDR2 SDRAM+Cache), based on Nexys4 FPGA board. 同济大学计算机系统结构课程设计，FPGA三级存储子系统。

SpinalHDL - Cryptography libraries

SHA-256 IP core for ZedBoard (Zynq SoC)

FPGA Assembly (FASM) Parser and Generator

Polyphony is Python based High-Level Synthesis compiler.

Unofficial Yosys WebAssembly packages

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

A hardware implementation of CNN, written by Verilog and synthesized on FPGA

720p FPGA Media Player (RISC-V + Motion JPEG + SD + HDMI on an Artix 7)

Generator of verilog description for FPGA MobileNet implementation

Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.

Verilog FPGA Parts Library. Old Octavo soft-CPU project.

KianRISC-V! No RISC-V, no fun! RISC-V CPU with strong design rules and unittested! CPU you can trust! kianv rv32im risc-v a hdmi soc with harris computer architecture in verilog: multicycle, singlecycle and 5-stage pipelining Processor. Multicycle Soc with firmware that runs raytracer, mandelbrot, 3d hdmi gfx, dma controller, etc.....

High-speed LaserDisc RF sampler

Materials for "Introduction to FPGA and Verilog" at MIPT DREC

Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)

Clash implementation of the Compucolor II home computer

Dockerfile with Vivado for CI

This repository contains iCEBreaker examples for Amaranth HDL.

CMU 18545 FPGA project -- Multi-channel ultrasound data acquisition and beamforming system.