888 Open source projects that are alternatives of or similar to TinyMIPS

NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.

A MIPS CPU implemented in Verilog

Cycle-accurate pre-silicon simulator of RISC-V and MIPS CPUs

Human Resource Machine - CPU Design #HRM

A small, light weight, RISC CPU soft core

A 32-bit RISC-V / MIPS ISA retargetable CPU core & SoC, 1.63 DMIPS/MHz

CMod-S6 SoC

QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.

RISC-V CPU Core (RV32IM)

A FPGA friendly 32 bit RISC-V CPU implementation

KianRISC-V! No RISC-V, no fun! RISC-V CPU with strong design rules and unittested! CPU you can trust! kianv rv32im risc-v a hdmi soc with harris computer architecture in verilog: multicycle, singlecycle and 5-stage pipelining Processor. Multicycle Soc with firmware that runs raytracer, mandelbrot, 3d hdmi gfx, dma controller, etc.....

Simple, orthogonal 32-bit computer architecture and environment

A small and customizable full-scale 32-bit RISC-V soft-core CPU and SoC written in platform-independent VHDL.

支持 45 条 MIPS 指令的单周期处理器 -- 计算机组成原理实验 NUAA Spring 2017

GPIB IEEE 488.1 core

An Open Source configuration of the Arty platform

Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.

SoCFPGA: Mapping HPS Peripherals, like I²C or CAN, over the FPGA fabric to FPGA I/O and using embedded Linux to control them (Intel Cyclone V)

A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set

Using HDL, from Boolean algebra and elementary logic gates to building a Central Processing Unit, a memory system, and a hardware platform, leading up to a 16-bit general-purpose computer. Then, implementing the modern software hierarchy designed to enable the translation and execution of object-based, high-level languages on a bare-bone computer hardware platform; Including Virtual machine,Compiler and Operating system.

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

FPGA-based RISC-V CPU+SoC.

Portable games console, designed from scratch: CPU, graphics, PCB, and the kitchen sink

VHDL project to run a simple 8-bit computer very similar to the one built by Ben Eater (see https://eater.net)

Modern improvements for MIT's xv6 OS

The Antikernel operating system project

A curated collection of technical documentation for Arcades, Handhelds, Consoles, Computers and MCU’s.

Managed Machine Learning Systems and Internet of Things Live Lesson

ROS 2 Hardware Acceleration Working Group community governance model & list of projects

A reimplementation of a tiny stack CPU

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

A Forth CPU and System on a Chip, based on the J1, written in VHDL

Unified interface for type-safe MMIO and CPU register access in Rust

Yet Another RISC-V Implementation

The core components of the L4Re operating system.

Unicorn CPU emulator framework (ARM, AArch64, M68K, Mips, Sparc, PowerPC, RiscV, X86)

32-bit Superscalar RISC-V CPU

A re-creation of a Cosmac ELF computer, Coded in SpinalHDL

The Task Parallel System Composer (TaPaSCo)

An operating system that doesn't try to be UNIX. Made completely from scratch with its own bootloader. 😊

Operating system in C written for fun and glory

UNIX-like operating system written in C and C++

Managing Kubernetes Quota with confidence

Drop In USB CDC ACM core for iCE40 FPGA

Productive and portable performance programming across spatial architectures (FPGAs, etc.) and vector architectures (GPUs, etc.)

opuntiaOS - an operating system targeting x86, ARMv7, Aarch64

MOS6581 SID chip emulator in SystemVerilog

A MIPS (R3000) Processor Emulator and Visualisation tool

A toy operating system written in Rust on RISC V(rv32im)

A research kernel written in modern C++.

An UNIX-like toy operating system runs on x86 CPU

Shuhai is a benchmarking-memory tool that allows FPGA programmers to demystify all the underlying details of memories, e.g., HBM and DDR4, on a Xilinx FPGA

SpinalHDL - Cryptography libraries

A nice friendly simple and easly customizable GUI for coinhives javascript miner to embed onto websites so users of your site can interact with features of the miner on every single page this javascript miner is to help those who have problems with advertisements/advertising/ads popups banners mobile redirects malvertising/malware etc and provid…

PlayStation emulator & debugger in C++17

Clash implementation of the Compucolor II home computer

Portable, advanced system information utility

Unofficial Yosys WebAssembly packages

A hand-made SMP-aware kernel