F32cA 32-bit RISC-V / MIPS ISA retargetable CPU core & SoC, 1.63 DMIPS/MHz
Stars: ✭ 338 (+745%)
intfftkFully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.
Stars: ✭ 43 (+7.5%)
MicrowattA tiny Open POWER ISA softcore written in VHDL 2008
Stars: ✭ 383 (+857.5%)
QNICE-FPGAQNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.
Stars: ✭ 51 (+27.5%)
Csi2rxOpen Source 4k CSI-2 Rx core for Xilinx FPGAs
Stars: ✭ 266 (+565%)
hwtVHDL/Verilog/SystemC code generator, simulator API written in python/c++
Stars: ✭ 145 (+262.5%)
Cocotbcocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
Stars: ✭ 740 (+1750%)
Awesome HdlHardware Description Languages
Stars: ✭ 385 (+862.5%)
cocotb-busPre-packaged testbenching tools and reusable bus interfaces for cocotb
Stars: ✭ 20 (-50%)
Mist BoardCore sources and tools for the MIST board
Stars: ✭ 350 (+775%)
Fpga BbcAcorn BBC Micro on an Altera DE1 FPGA board
Stars: ✭ 14 (-65%)
HalHAL – The Hardware Analyzer
Stars: ✭ 298 (+645%)
simple-riscvA simple three-stage RISC-V CPU
Stars: ✭ 14 (-65%)
Vhdl ModeA package for Sublime Text that aids coding in the VHDL language.
Stars: ✭ 31 (-22.5%)
fpga puf🔑 Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.
Stars: ✭ 44 (+10%)
getting-startedList of ideas for getting started with TimVideos projects
Stars: ✭ 50 (+25%)
MulticompSimple custom computer on a FPGA
Stars: ✭ 8 (-80%)
pyarch🔌 Hardware Abstraction Library in Python
Stars: ✭ 15 (-62.5%)
GplgpuGPL v3 2D/3D graphics engine in verilog
Stars: ✭ 515 (+1187.5%)
GcvideoGameCube Digital AV converter
Stars: ✭ 385 (+862.5%)
JSON-for-VHDLA JSON library implemented in VHDL.
Stars: ✭ 56 (+40%)
OpenrioContains VHDL IP-blocks to create stand-alone RapidIO-endpoints, RapidIO-switches and RapidIO-switches with local endpoints.
Stars: ✭ 23 (-42.5%)
Lxp32 CpuA lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set
Stars: ✭ 27 (-32.5%)
Riscv vhdlPortable RISC-V System-on-Chip implementation: RTL, debugger and simulators
Stars: ✭ 356 (+790%)
AudioxtreamerASIO driver, Usb Driver, FX2LP Firmware, VHDL Fpga, Schematics & PCB Layout for the AudioXtreamer, a USB 2.0 32ch Audio/Midi interface for retrofitting into digital mixers/interfaces.
Stars: ✭ 22 (-45%)
NvcVHDL compiler and simulator
Stars: ✭ 347 (+767.5%)
OphidianOphidian's Mirror Repository on github. https://gitlab.com/eclufsc/eda/ophidian
Stars: ✭ 32 (-20%)
Dsi ShieldArduino MIPI DSI Shield
Stars: ✭ 330 (+725%)
EdalizeAn abstraction library for interfacing EDA tools
Stars: ✭ 270 (+575%)
Opl3 fpgaReverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer
Stars: ✭ 255 (+537.5%)
I2s Interface VhdlA simplified i2s interface taken from OpenCores' I2S Interface. Aimed for Altera Avalon Streaming interface.
Stars: ✭ 6 (-85%)
SmartVHDLSublimeText Plugin for VHDL (highlight, autocompletion, navigation, ...)
Stars: ✭ 12 (-70%)
Open Source Fpga Bitcoin MinerA completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able projects for numerous boards.
Stars: ✭ 989 (+2372.5%)
dockerScripts to build and use docker images including GHDL
Stars: ✭ 27 (-32.5%)
Sha 256 HdlAn implementation of original SHA-256 hash function in (RTL) VHDL
Stars: ✭ 6 (-85%)
vcdVCD file (Value Change Dump) command line viewer
Stars: ✭ 40 (+0%)
RewireExperimental compiler for a subset of Haskell to VHDL
Stars: ✭ 10 (-75%)
CryptoHDLA list of VHDL codes implementing cryptographic algorithms
Stars: ✭ 14 (-65%)
Fpga webserverA work-in-progress for what is to be a software-free web server for static content.
Stars: ✭ 762 (+1805%)
mathUseful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)
Stars: ✭ 15 (-62.5%)
Image ProcessingImage Processing Toolbox in Verilog using Basys3 FPGA
Stars: ✭ 31 (-22.5%)
PoC-ExamplesThis repository contains synthesizable examples which use the PoC-Library.
Stars: ✭ 27 (-32.5%)
SpinalhdlScala based HDL
Stars: ✭ 696 (+1640%)
fphdlVHDL-2008 Support Library
Stars: ✭ 36 (-10%)
NexyspsramAXI PSRAM Controller IP for use with Digilent Nexys 4
Stars: ✭ 7 (-82.5%)
VunitVUnit is a unit testing framework for VHDL/SystemVerilog
Stars: ✭ 438 (+995%)
FlearadioDigital FM Radio Receiver for FPGA
Stars: ✭ 36 (-10%)
Clash CompilerHaskell to VHDL/Verilog/SystemVerilog compiler
Stars: ✭ 958 (+2295%)
AesAES-128 hardware implementation
Stars: ✭ 25 (-37.5%)
Parallella HwParallella board design files
Stars: ✭ 389 (+872.5%)