716 Open source projects that are alternatives of or similar to wbi2c

A configurable C++ generator of pipelined Verilog FFT cores

A collection of phase locked loop (PLL) related projects

A collection of debugging busses developed and presented at zipcpu.com

An Open Source configuration of the Arty platform

Virtio implementation in SystemVerilog

Bus bridges and other odds and ends

CMod-S6 SoC

A Video display simulator

A FPGA implementation of the NTP and NTS protocols

32-bit Superscalar RISC-V CPU

CNN acceleration on virtex-7 FPGA with verilog HDL

Recipe for FPGA cooking

CHIP-8 console on FPGA

Notes on the Red Pitaya Open Source Instrument

FPGA/hardware design of openwifi

Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.

KianRISC-V! No RISC-V, no fun! RISC-V CPU with strong design rules and unittested! CPU you can trust! kianv rv32im risc-v a hdmi soc with harris computer architecture in verilog: multicycle, singlecycle and 5-stage pipelining Processor. Multicycle Soc with firmware that runs raytracer, mandelbrot, 3d hdmi gfx, dma controller, etc.....

SVUT is a simple framework to create Verilog/SystemVerilog unit tests. Just focus on your tests!

A programming language for FPGAs.

Must-have verilog systemverilog modules

【原创，已被编入官方教材】Three-level storage subsystem(SD+DDR2 SDRAM+Cache), based on Nexys4 FPGA board. 同济大学计算机系统结构课程设计，FPGA三级存储子系统。

Programmable multichannel ADPCM decoder for FPGA

Lattice iCE40: development platform for PlatformIO

I2C slave library for the Raspberry Pi Pico

Small Processing Unit 32: A compact RV32I CPU written in Verilog

Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for FPGA development.

Implementation of a Tensor Processing Unit for embedded systems and the IoT.

CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.

open-source IEEE 802.11 WiFi baseband FPGA (chip) design

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

Verilog Generator of Neural Net Digit Detector for FPGA

MOS6581 SID chip emulator in SystemVerilog

Generator of verilog description for FPGA MobileNet implementation

A full-speed device-side USB peripheral core written in Verilog.

mirror of https://git.elphel.com/Elphel/eddr3

All open source file and project for OpenFPGAduino project

Docker Development Environment for SpinalHDL

Tools for running FPGA vendor toolchains with Docker

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

Cross EDA Abstraction and Automation

Yet Another Tetris on FPGA Implementation

Materials for "Introduction to FPGA and Verilog" at MIPT DREC

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.

FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor.

Sphinx Extension which generates various types of diagrams from Verilog code.

Facilitates building open source tools for working with hardware description languages (HDLs)

Bazel build rules for Verilator

An Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.

SpinalHDL - Cryptography libraries

Hardware definition library and environment for designing and building digital hardware for FPGAs, using only open source tools

PDP-6 Emulator

vdcd - virtual device controller daemon/framework for digitalSTROM

NN on FPGA

Yet Another RISC-V Implementation

FPGA-based JPEG-LS image compressor.

Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm

Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images

A simple, basic, formally verified UART controller

LicheeTang 蜂鸟E203 Core

A hardware implementation of CNN, written by Verilog and synthesized on FPGA