1201 Open source projects that are alternatives of or similar to Cascade

Human Resource Machine - CPU Design #HRM

HAL – The Hardware Analyzer

FPGA 101 - Workshop materials

CAPCOM arcade hardware accurately replicated on MiST and MiSTer FPGA platforms. It covers Ghosts'n Goblins, 1942, 1943, Commando, F1-Dream, GunSmoke, Tiger Road, Black Tiger, Bionic Commando, Higemaru, Street Fighter and Vulgus.

🤖 SoCFPGA: Open Source embedded Linux developed for Intel (ALTERA) SoC-FPGAs (Cyclone V & Arria 10)

Compact FPGA game console

List of ideas for getting started with TimVideos projects

Minimal SDR with Lattice MachXO2 FPGA. And a port to Cyclone3 by Steven Groom

FPGA-based USB-device controller to implement USB-CDC, USB-HID, etc.

A utility for Composing FPGA designs from Peripherals

FPGA-based RISC-V CPU+SoC.

Tool to generate register RTL, models, and docs using SystemRDL or JSpec input

LicheeTang 蜂鸟E203 Core

A MIPS CPU implemented in Verilog

Recipe for FPGA cooking

Implementation of a Tensor Processing Unit for embedded systems and the IoT.

FPGA/hardware design of openwifi

CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.

The OpenPiton Platform

32-bit Superscalar RISC-V CPU

Tools for running FPGA vendor toolchains with Docker

open-source IEEE 802.11 WiFi baseband FPGA (chip) design

RISC-V CPU Core (RV32IM)

Reference design for Lattice ECP5 FPGA. Featuring Raspberry Pi interface and 6 PMODs

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

A curated list of awesome open source hardware design tools

A programming language for FPGAs.

This is a higan/Verilator co-simulation example/framework

Video Game custom chips reverse-engineered from silicon

An abstraction library for interfacing EDA tools

Small Processing Unit 32: A compact RV32I CPU written in Verilog

High-speed LaserDisc RF sampler

Virtio implementation in SystemVerilog

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

An Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.

SpinalHDL - Cryptography libraries

A collection of phase locked loop (PLL) related projects

Scripts to build and use docker images including GHDL

The Kria Robotics Stack (KRS) is a ROS 2 superset for industry, an integrated set of robot libraries and utilities to accelerate the development, maintenance and commercialization of industrial-grade robotic solutions while using adaptive computing.

ROS 2 Hardware Acceleration Working Group community governance model & list of projects

Yet Another RISC-V Implementation

PDP-6 Emulator

Imitate SDcard using FPGAs.

NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.

FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor.

A hardware implementation of CNN, written by Verilog and synthesized on FPGA

A configurable C++ generator of pipelined Verilog FFT cores

A low cost FPGA development board for absolute newbies

FPGA core for SHA256d mining targeting Lattice iCE40 devices.

HW Design: A Functional Approach

Haskell library for hardware description

VHDL/Verilog/SystemC code generator, simulator API written in python/c++

Global Dark Mode for ALL apps on ANY platforms.

A full-speed device-side USB peripheral core written in Verilog.

An FPGA implementation of a classic 80ies speech synthesizer. Done for the Retro Challenge 2017/10.

Haskell to VHDL/Verilog/SystemVerilog compiler

Image Processing Toolbox in Verilog using Basys3 FPGA

Lattice iCE40: development platform for PlatformIO

A FPGA implementation of the NTP and NTS protocols

Robotic Application Processor