143 Open source projects that are alternatives of or similar to Gplgpu

OpenN@S: Open-source software to NAS automatic VHDL code generation

A parser for Value Change Dump (VCD) files as specified in the IEEE System Verilog 1800-2012 standard.

A list of VHDL codes implementing cryptographic algorithms

An open-source VHDL library for FPGA design.

Docker Development Environment for SpinalHDL

Scripts to build and use docker images including GHDL

SpinalHDL - Cryptography libraries

Arduino MIPI DSI Shield

@elahe-dastan / @1995parham training and testing repository 📚 🤓

This repository contains synthesizable examples which use the PoC-Library.

HDL symbol generator

SublimeText Plugin for VHDL (highlight, autocompletion, navigation, ...)

Yet Another VHDL tool

VHDL compiler and simulator

Virtual development board for HDL design

VCD file (Value Change Dump) command line viewer

HDMI Out VHDL code for 7-series Xilinx FPGAs

Community created parallella projects

👇 Add capacitive touch buttons to any FPGA!

Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)

Interface for MSX to Connect and use Raspberry Pi resources

An abstraction library for interfacing EDA tools

RISC-V by VectorBlox

VHDL-2008 Support Library

Streaming based VHDL parser.

A list of papers, docs, codes about model quantization. This repo is aimed to provide the info for model quantization research, we are continuously improving the project. Welcome to PR the works (papers, repositories) that are missed by the repo.

A simple three-stage RISC-V CPU

A pipelined, in-order, scalar VHDL implementation of the MRISC32 ISA

Core sources and tools for the MIST board

Trying to verify Verilog/VHDL designs with formal methods and tools

Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.

Vim plugin to aid VHDL development (for LSP, see https://github.com/suoto/hdl_checker)

Hardware Description Languages

A simple I2C minion in VHDL

🔑 Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.

Simple implementation of cache using VHDL

A 32-bit RISC-V / MIPS ISA retargetable CPU core & SoC, 1.63 DMIPS/MHz

VHDL FPGA design of an optimized Blake2b pipeline to mine Siacoin

VHDL/Verilog/SystemC code generator, simulator API written in python/c++

VHDL project to run a simple 8-bit computer very similar to the one built by Ben Eater (see https://eater.net)

Parallella board design files

Cross EDA Abstraction and Automation

List of ideas for getting started with TimVideos projects

VHDL formatter web online written in typescript

HAL – The Hardware Analyzer

🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.

QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

A tiny Open POWER ISA softcore written in VHDL 2008

Tools for running FPGA vendor toolchains with Docker

🔌 Hardware Abstraction Library in Python

A Forth CPU and System on a Chip, based on the J1, written in VHDL

Open Source 4k CSI-2 Rx core for Xilinx FPGAs

Pre-packaged testbenching tools and reusable bus interfaces for cocotb

VUnit is a unit testing framework for VHDL/SystemVerilog

GameCube Digital AV converter

Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators

Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer

A JSON library implemented in VHDL.