4724 Open source projects that are alternatives of or similar to Hdl

NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.

Robotic Application Processor

Global Dark Mode for ALL apps on ANY platforms.

FPGA-based JPEG-LS image compressor.

Scala based HDL

Pipelined implementation of Sobel Edge Detection on OV7670 camera and on still images

Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)

FPGA core for SHA256d mining targeting Lattice iCE40 devices.

Various HDL (Verilog) IP Cores

KiwiSDR: BeagleBone web-accessible shortwave receiver and software-defined GPS

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

The USRP™ Hardware Driver Repository

Generator of verilog description for FPGA MobileNet implementation

Yet Another RISC-V Implementation

PDP-6 Emulator

A full-speed device-side USB peripheral core written in Verilog.

A configurable C++ generator of pipelined Verilog FFT cores

Minimal SDR with Lattice MachXO2 FPGA. And a port to Cyclone3 by Steven Groom

Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for FPGA development.

Haskell library for hardware description

Imitate SDcard using FPGAs.

Repository for basic (and not so basic) Verilog blocks with high re-use potential

RISC-V CPU Core (RV32IM)

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

Verilog to Routing -- Open Source CAD Flow for FPGA Research

An Verilog implementation of 7-to-1 LVDS Serializer. Which can be used for comunicating FPGAs with LVDS TFT Screens.

A small, light weight, RISC CPU soft core

MOS6581 SID chip emulator in SystemVerilog

SpinalHDL - Cryptography libraries

Sphinx Extension which generates various types of diagrams from Verilog code.

Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm

NN on FPGA

FPGA Verilog implementation of 1949 EDSAC Computer with animated tape reader, panel, teleprinter and CRT scope

Small Processing Unit 32: A compact RV32I CPU written in Verilog

A FPGA implementation of the NTP and NTS protocols

mirror of https://git.elphel.com/Elphel/eddr3

Wishbone controlled I2C controllers

FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor.

VHDL/Verilog/SystemC code generator, simulator API written in python/c++

List of ideas for getting started with TimVideos projects

FPGA-based USB-device controller to implement USB-CDC, USB-HID, etc.

Virtio implementation in SystemVerilog

Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.

An FPGA implementation of a classic 80ies speech synthesizer. Done for the Retro Challenge 2017/10.

An abstraction library for interfacing EDA tools

Homebrew game for homebrew FPGA game console

The OpenPiton Platform

🌟 IceZUM Alhambra: an Arduino-like Open FPGA electronic board

FPGA Haskell machine with game changing performance. Reduceron is Matthew Naylor, Colin Runciman and Jason Reich's high performance FPGA softcore for running lazy functional programs, including hardware garbage collection. Reduceron has been implemented on various FPGAs with clock frequency ranging from 60 to 150 MHz depending on the FPGA. A high degree of parallelism allows Reduceron to implement graph evaluation very efficiently. This fork aims to continue development on this, with a view to practical applications. Comments, questions, etc are welcome.

Video Game custom chips reverse-engineered from silicon

A Just-In-Time Compiler for Verilog from VMware Research

Hardware Description Languages

PlatformIO IDE for Atom: The next generation integrated development environment for IoT

🌱 Open source ecosystem for open FPGA boards

A hardware implementation of CNN, written by Verilog and synthesized on FPGA

Hardware definition library and environment for designing and building digital hardware for FPGAs, using only open source tools

A collection of phase locked loop (PLL) related projects

An open source library for image processing on FPGA.

PlatformIO is a professional collaborative platform for embedded development 👽 A place where Developers and Teams have true Freedom! No more vendor lock-in!

PlatformIO IDE for VSCode: The next generation integrated development environment for IoT