143 Open source projects that are alternatives of or similar to Openrio

QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.

A pipelined, in-order, scalar VHDL implementation of the MRISC32 ISA

A 32-bit RISC-V / MIPS ISA retargetable CPU core & SoC, 1.63 DMIPS/MHz

VHDL/Verilog/SystemC code generator, simulator API written in python/c++

Simple implementation of cache using VHDL

A tiny Open POWER ISA softcore written in VHDL 2008

Pre-packaged testbenching tools and reusable bus interfaces for cocotb

cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

Vim plugin to aid VHDL development (for LSP, see https://github.com/suoto/hdl_checker)

Open Source 4k CSI-2 Rx core for Xilinx FPGAs

🔑 Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.

VHDL project to run a simple 8-bit computer very similar to the one built by Ben Eater (see https://eater.net)

Hardware Description Languages

List of ideas for getting started with TimVideos projects

🔌 Hardware Abstraction Library in Python

Core sources and tools for the MIST board

Streaming based VHDL parser.

Trying to verify Verilog/VHDL designs with formal methods and tools

HAL – The Hardware Analyzer

A simple I2C minion in VHDL

GPL v3 2D/3D graphics engine in verilog

VHDL FPGA design of an optimized Blake2b pipeline to mine Siacoin

A simple three-stage RISC-V CPU

Scripts to build and use docker images including GHDL

A parser for Value Change Dump (VCD) files as specified in the IEEE System Verilog 1800-2012 standard.

GameCube Digital AV converter

VCD file (Value Change Dump) command line viewer

An implementation of original SHA-256 hash function in (RTL) VHDL

A list of VHDL codes implementing cryptographic algorithms

Community created parallella projects

Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)

A Audio Interface for the Zedboard

This repository contains synthesizable examples which use the PoC-Library.

Portable RISC-V System-on-Chip implementation: RTL, debugger and simulators

VHDL-2008 Support Library

A work-in-progress for what is to be a software-free web server for static content.

A JSON library implemented in VHDL.

VHDL compiler and simulator

HDL symbol generator

ASIO driver, Usb Driver, FX2LP Firmware, VHDL Fpga, Schematics & PCB Layout for the AudioXtreamer, a USB 2.0 32ch Audio/Midi interface for retrofitting into digital mixers/interfaces.

An open-source VHDL library for FPGA design.

Arduino MIPI DSI Shield

Yet Another VHDL tool

Scala based HDL

OpenN@S: Open-source software to NAS automatic VHDL code generation

An abstraction library for interfacing EDA tools

Virtual development board for HDL design

A simplified i2s interface taken from OpenCores' I2S Interface. Aimed for Altera Avalon Streaming interface.

SpinalHDL - Cryptography libraries

Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer

HDMI Out VHDL code for 7-series Xilinx FPGAs

VUnit is a unit testing framework for VHDL/SystemVerilog

SublimeText Plugin for VHDL (highlight, autocompletion, navigation, ...)

VHDL for basic floating-point operations.

HashVoodoo FPGA Bitcoin Miner

ECE368 | Lab

Parallella board design files

Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.