1001 Open source projects that are alternatives of or similar to Cocotb

A List of Free and Open Source Hardware Verification Tools and Frameworks

CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.

Open source software for chip reverse engineering.

VUnit is a unit testing framework for VHDL/SystemVerilog

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

A formally verified high-level synthesis tool based on CompCert and written in Coq.

Ophidian's Mirror Repository on github. https://gitlab.com/eclufsc/eda/ophidian

A FPGA friendly 32 bit RISC-V CPU implementation

HDL symbol generator

SpinalHDL - Cryptography libraries

Pre-packaged testbenching tools and reusable bus interfaces for cocotb

A reimplementation of a tiny stack CPU

Scala based HDL

Vim plugin to aid VHDL development (for LSP, see https://github.com/suoto/hdl_checker)

Docker Development Environment for SpinalHDL

OSVVM Utility Library: AlertLogPkg, CoveragePkg, RandomPkg, ScoreboardGenericPkg, MemoryPkg, TbUtilPkg, TranscriptPkg, ...

Haskell to VHDL/Verilog/SystemVerilog compiler

Repurposing existing HDL tools to help writing better code

Ruby interface to IEEE 1364-2005 Verilog VPI

Cross EDA Abstraction and Automation

A parser for Value Change Dump (VCD) files as specified in the IEEE System Verilog 1800-2012 standard.

Trying to verify Verilog/VHDL designs with formal methods and tools

Virtual development board for HDL design

Scripts to build and use docker images including GHDL

VHDL/Verilog/SystemC code generator, simulator API written in python/c++

An abstraction library for interfacing EDA tools

A tiny Open POWER ISA softcore written in VHDL 2008

Useful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)

List of ideas for getting started with TimVideos projects

Image Processing Toolbox in Verilog using Basys3 FPGA

Tools for running FPGA vendor toolchains with Docker

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

PCIe (1.0a to 2.0) Virtual host model for verilog

Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.

Implementation of a Tensor Processing Unit for embedded systems and the IoT.

VHDL-2008 Support Library

RISC-V CPU Core (RV32IM)

Hardware Description Languages

Spring 실전 가이드

Verilog library for ASIC and FPGA designers

基于Jmeter实现的在线压测和管理Jmx的平台。

GPL v3 2D/3D graphics engine in verilog

PlatformIO IDE for VSCode: The next generation integrated development environment for IoT

Release with confidence, state-of-the-art property testing for Haskell.

BDD Testing Framework for Go

An advanced SAT solver

Open source, high performance, FPGA-based NIC

High performance motor control

🔒Unified API for password hashing algorithms

Verilog Ethernet components for FPGA implementation

Faker is a pure Elixir library for generating fake data.

The A11y Machine is an automated accessibility testing tool which crawls and tests pages of any web application to produce detailed reports.

PlatformIO IDE for Atom: The next generation integrated development environment for IoT

Verilog to Routing -- Open Source CAD Flow for FPGA Research

Qiniu httptest utilities

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

Smocker is a simple and efficient HTTP mock server and proxy.

Библия QA это почти 300 страниц обновляемой смеси ответов на вопросы с реальных собеседований на QA, полезных ресурсов и статей, перевода интересного контента с зарубежных ресурсов и агрегации материала с отечественных.

🦎 Simple and complete Vue.js testing utilities that encourage good testing practices.

A Gradle plugin for printing beautiful logs on the console while running tests