dpllA collection of phase locked loop (PLL) related projects
Stars: ✭ 55 (-41.49%)
Wb2axipBus bridges and other odds and ends
Stars: ✭ 177 (+88.3%)
wbi2cWishbone controlled I2C controllers
Stars: ✭ 25 (-73.4%)
dblclockfftA configurable C++ generator of pipelined Verilog FFT cores
Stars: ✭ 147 (+56.38%)
Speech256An FPGA implementation of a classic 80ies speech synthesizer. Done for the Retro Challenge 2017/10.
Stars: ✭ 51 (-45.74%)
FPGA-USB-DeviceFPGA-based USB-device controller to implement USB-CDC, USB-HID, etc.
Stars: ✭ 29 (-69.15%)
RiscvRISC-V CPU Core (RV32IM)
Stars: ✭ 272 (+189.36%)
Icezum🌟 IceZUM Alhambra: an Arduino-like Open FPGA electronic board
Stars: ✭ 280 (+197.87%)
ReduceronFPGA Haskell machine with game changing performance. Reduceron is Matthew Naylor, Colin Runciman and Jason Reich's high performance FPGA softcore for running lazy functional programs, including hardware garbage collection. Reduceron has been implemented on various FPGAs with clock frequency ranging from 60 to 150 MHz depending on the FPGA. A high degree of parallelism allows Reduceron to implement graph evaluation very efficiently. This fork aims to continue development on this, with a view to practical applications. Comments, questions, etc are welcome.
Stars: ✭ 308 (+227.66%)
Apio🌱 Open source ecosystem for open FPGA boards
Stars: ✭ 366 (+289.36%)
1bitSDRMinimal SDR with Lattice MachXO2 FPGA. And a port to Cyclone3 by Steven Groom
Stars: ✭ 53 (-43.62%)
Deep-DarkFantasyGlobal Dark Mode for ALL apps on ANY platforms.
Stars: ✭ 16 (-82.98%)
rapcoresRobotic Application Processor
Stars: ✭ 14 (-85.11%)
J1scA reimplementation of a tiny stack CPU
Stars: ✭ 64 (-31.91%)
CoresVarious HDL (Verilog) IP Cores
Stars: ✭ 271 (+188.3%)
Beagle sdr gpsKiwiSDR: BeagleBone web-accessible shortwave receiver and software-defined GPS
Stars: ✭ 300 (+219.15%)
blarneyHaskell library for hardware description
Stars: ✭ 81 (-13.83%)
ZipcpuA small, light weight, RISC CPU soft core
Stars: ✭ 640 (+580.85%)
Platformio CorePlatformIO is a professional collaborative platform for embedded development 👽 A place where Developers and Teams have true Freedom! No more vendor lock-in!
Stars: ✭ 5,539 (+5792.55%)
RggenCode generation tool for configuration and status registers
Stars: ✭ 54 (-42.55%)
Darkriscvopensouce RISC-V cpu core implemented in Verilog from scratch in one night!
Stars: ✭ 1,062 (+1029.79%)
Platformio Vscode IdePlatformIO IDE for VSCode: The next generation integrated development environment for IoT
Stars: ✭ 676 (+619.15%)
SpinalhdlScala based HDL
Stars: ✭ 696 (+640.43%)
ZbasicA bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
Stars: ✭ 27 (-71.28%)
hwtVHDL/Verilog/SystemC code generator, simulator API written in python/c++
Stars: ✭ 145 (+54.26%)
getting-startedList of ideas for getting started with TimVideos projects
Stars: ✭ 50 (-46.81%)
Symbiflow ExamplesExample designs showing different ways to use SymbiFlow toolchains.
Stars: ✭ 71 (-24.47%)
shapool-coreFPGA core for SHA256d mining targeting Lattice iCE40 devices.
Stars: ✭ 19 (-79.79%)
VGChipsVideo Game custom chips reverse-engineered from silicon
Stars: ✭ 86 (-8.51%)
AntikernelThe Antikernel operating system project
Stars: ✭ 75 (-20.21%)
intfftkFully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.
Stars: ✭ 43 (-54.26%)
mathUseful m-scripts for DSP (CIC, FIR, FFT, Fast convolution, Partial Filters etc.)
Stars: ✭ 15 (-84.04%)
Jt gngCAPCOM arcade hardware accurately replicated on MiST and MiSTer FPGA platforms. It covers Ghosts'n Goblins, 1942, 1943, Commando, F1-Dream, GunSmoke, Tiger Road, Black Tiger, Bionic Commando, Higemaru, Street Fighter and Vulgus.
Stars: ✭ 65 (-30.85%)
EdalizeAn abstraction library for interfacing EDA tools
Stars: ✭ 270 (+187.23%)
Core jpegHigh throughput JPEG decoder in Verilog for FPGA
Stars: ✭ 64 (-31.91%)
Fake-SDcardImitate SDcard using FPGAs.
Stars: ✭ 26 (-72.34%)
VerilogRepository for basic (and not so basic) Verilog blocks with high re-use potential
Stars: ✭ 296 (+214.89%)
OpenpitonThe OpenPiton Platform
Stars: ✭ 282 (+200%)
Image ProcessingImage Processing Toolbox in Verilog using Basys3 FPGA
Stars: ✭ 31 (-67.02%)
Higan VerilogThis is a higan/Verilator co-simulation example/framework
Stars: ✭ 35 (-62.77%)
UhdThe USRP™ Hardware Driver Repository
Stars: ✭ 544 (+478.72%)
Platformio Atom IdePlatformIO IDE for Atom: The next generation integrated development environment for IoT
Stars: ✭ 475 (+405.32%)
ElectronA mixed signal netlist language (pre-alpha)
Stars: ✭ 52 (-44.68%)
Ustc RvsocFPGA-based RISC-V CPU+SoC.
Stars: ✭ 77 (-18.09%)
HdlHDL libraries and projects
Stars: ✭ 727 (+673.4%)
Open Fpga Verilog TutorialLearn how to design digital systems and synthesize them into an FPGA using only opensource tools
Stars: ✭ 464 (+393.62%)
WbscopeA wishbone controlled scope for FPGA's
Stars: ✭ 50 (-46.81%)
Clash CompilerHaskell to VHDL/Verilog/SystemVerilog compiler
Stars: ✭ 958 (+919.15%)
VexriscvA FPGA friendly 32 bit RISC-V CPU implementation
Stars: ✭ 1,041 (+1007.45%)
Icestudio❄️ Visual editor for open FPGA boards
Stars: ✭ 958 (+919.15%)
usbcorevA full-speed device-side USB peripheral core written in Verilog.
Stars: ✭ 135 (+43.62%)
Rsyocto🤖 SoCFPGA: Open Source embedded Linux developed for Intel (ALTERA) SoC-FPGAs (Cyclone V & Arria 10)
Stars: ✭ 41 (-56.38%)
CascadeA Just-In-Time Compiler for Verilog from VMware Research
Stars: ✭ 413 (+339.36%)
IrohaIntermediate Representation Of Hardware Abstraction (LLVM-ish for HLS)
Stars: ✭ 30 (-68.09%)
Mips CpuA MIPS CPU implemented in Verilog
Stars: ✭ 38 (-59.57%)