getting-startedList of ideas for getting started with TimVideos projects
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Darkriscvopensouce RISC-V cpu core implemented in Verilog from scratch in one night!
Stars: ✭ 1,062 (+686.67%)
Ustc RvsocFPGA-based RISC-V CPU+SoC.
Stars: ✭ 77 (-42.96%)
Biriscv32-bit Superscalar RISC-V CPU
Stars: ✭ 208 (+54.07%)
spu32Small Processing Unit 32: A compact RV32I CPU written in Verilog
Stars: ✭ 51 (-62.22%)
drec-fpga-introMaterials for "Introduction to FPGA and Verilog" at MIPT DREC
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RiscvRISC-V CPU Core (RV32IM)
Stars: ✭ 272 (+101.48%)
Platformio CorePlatformIO is a professional collaborative platform for embedded development 👽 A place where Developers and Teams have true Freedom! No more vendor lock-in!
Stars: ✭ 5,539 (+4002.96%)
yarviYet Another RISC-V Implementation
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ReduceronFPGA Haskell machine with game changing performance. Reduceron is Matthew Naylor, Colin Runciman and Jason Reich's high performance FPGA softcore for running lazy functional programs, including hardware garbage collection. Reduceron has been implemented on various FPGAs with clock frequency ranging from 60 to 150 MHz depending on the FPGA. A high degree of parallelism allows Reduceron to implement graph evaluation very efficiently. This fork aims to continue development on this, with a view to practical applications. Comments, questions, etc are welcome.
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Beagle sdr gpsKiwiSDR: BeagleBone web-accessible shortwave receiver and software-defined GPS
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Apio🌱 Open source ecosystem for open FPGA boards
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FiresimFireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation in the Cloud
Stars: ✭ 415 (+207.41%)
Scr1SCR1 is a high-quality open-source RISC-V MCU core in Verilog
Stars: ✭ 393 (+191.11%)
Open Fpga Verilog TutorialLearn how to design digital systems and synthesize them into an FPGA using only opensource tools
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Neorv32A small and customizable full-scale 32-bit RISC-V soft-core CPU and SoC written in platform-independent VHDL.
Stars: ✭ 106 (-21.48%)
Platformio Vscode IdePlatformIO IDE for VSCode: The next generation integrated development environment for IoT
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HdlHDL libraries and projects
Stars: ✭ 727 (+438.52%)
RiscboyPortable games console, designed from scratch: CPU, graphics, PCB, and the kitchen sink
Stars: ✭ 103 (-23.7%)
Platformio Atom IdePlatformIO IDE for Atom: The next generation integrated development environment for IoT
Stars: ✭ 475 (+251.85%)
ZbasicA bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
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Icestudio❄️ Visual editor for open FPGA boards
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Open Register Design ToolTool to generate register RTL, models, and docs using SystemRDL or JSpec input
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AutofpgaA utility for Composing FPGA designs from Peripherals
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VerilogRepository for basic (and not so basic) Verilog blocks with high re-use potential
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OpenpitonThe OpenPiton Platform
Stars: ✭ 282 (+108.89%)
CascadeA Just-In-Time Compiler for Verilog from VMware Research
Stars: ✭ 413 (+205.93%)
Icezum🌟 IceZUM Alhambra: an Arduino-like Open FPGA electronic board
Stars: ✭ 280 (+107.41%)
ZipcpuA small, light weight, RISC CPU soft core
Stars: ✭ 640 (+374.07%)
Hrm CpuHuman Resource Machine - CPU Design #HRM
Stars: ✭ 43 (-68.15%)
SpinalhdlScala based HDL
Stars: ✭ 696 (+415.56%)
UhdThe USRP™ Hardware Driver Repository
Stars: ✭ 544 (+302.96%)
ConnectalConnectal is a framework for software-driven hardware development.
Stars: ✭ 117 (-13.33%)
IrohaIntermediate Representation Of Hardware Abstraction (LLVM-ish for HLS)
Stars: ✭ 30 (-77.78%)
Clash CompilerHaskell to VHDL/Verilog/SystemVerilog compiler
Stars: ✭ 958 (+609.63%)
VexriscvA FPGA friendly 32 bit RISC-V CPU implementation
Stars: ✭ 1,041 (+671.11%)
WbscopeA wishbone controlled scope for FPGA's
Stars: ✭ 50 (-62.96%)
Rsyocto🤖 SoCFPGA: Open Source embedded Linux developed for Intel (ALTERA) SoC-FPGAs (Cyclone V & Arria 10)
Stars: ✭ 41 (-69.63%)
FwriscFeatherweight RISC-V implementation
Stars: ✭ 39 (-71.11%)
Mips CpuA MIPS CPU implemented in Verilog
Stars: ✭ 38 (-71.85%)
RggenCode generation tool for configuration and status registers
Stars: ✭ 54 (-60%)
Vm80ai8080 precise replica in Verilog, based on reverse engineering of real die
Stars: ✭ 114 (-15.56%)
NyuziprocessorGPGPU microprocessor architecture
Stars: ✭ 1,351 (+900.74%)
Higan VerilogThis is a higan/Verilator co-simulation example/framework
Stars: ✭ 35 (-74.07%)
ElectronA mixed signal netlist language (pre-alpha)
Stars: ✭ 52 (-61.48%)
Riscy SocRiscy-SoC is SoC based on RISC-V CPU core, designed in Verilog
Stars: ✭ 59 (-56.3%)
Core jpegHigh throughput JPEG decoder in Verilog for FPGA
Stars: ✭ 64 (-52.59%)
Symbiflow ExamplesExample designs showing different ways to use SymbiFlow toolchains.
Stars: ✭ 71 (-47.41%)
AntikernelThe Antikernel operating system project
Stars: ✭ 75 (-44.44%)
Jt gngCAPCOM arcade hardware accurately replicated on MiST and MiSTer FPGA platforms. It covers Ghosts'n Goblins, 1942, 1943, Commando, F1-Dream, GunSmoke, Tiger Road, Black Tiger, Bionic Commando, Higemaru, Street Fighter and Vulgus.
Stars: ✭ 65 (-51.85%)
VgasimA Video display simulator
Stars: ✭ 94 (-30.37%)
AesVerilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.
Stars: ✭ 131 (-2.96%)