1097 Open source projects that are alternatives of or similar to Awesome Open Hardware Verification

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A parser for Value Change Dump (VCD) files as specified in the IEEE System Verilog 1800-2012 standard.

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Ophidian's Mirror Repository on github. https://gitlab.com/eclufsc/eda/ophidian

Vim plugin to aid VHDL development (for LSP, see https://github.com/suoto/hdl_checker)

A formally verified high-level synthesis tool based on CompCert and written in Coq.

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