Cva6The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
Jt gngCAPCOM arcade hardware accurately replicated on MiST and MiSTer FPGA platforms. It covers Ghosts'n Goblins, 1942, 1943, Commando, F1-Dream, GunSmoke, Tiger Road, Black Tiger, Bionic Commando, Higemaru, Street Fighter and Vulgus.
J1scA reimplementation of a tiny stack CPU
Core jpegHigh throughput JPEG decoder in Verilog for FPGA
Sega System For FpgaFPGA Sega in Verilog, for Xilinx Virtex, circa 2002. Has an emulator thrown in, to simplify FPGA debugging.
RggenCode generation tool for configuration and status registers
ElectronA mixed signal netlist language (pre-alpha)
Darkriscvopensouce RISC-V cpu core implemented in Verilog from scratch in one night!
Spi FpgaSPI master and slave for FPGA written in VHDL
WbscopeA wishbone controlled scope for FPGA's
Ecp5 PcieMirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe
VexriscvA FPGA friendly 32 bit RISC-V CPU implementation
Fpga FftA highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm
Hrm CpuHuman Resource Machine - CPU Design #HRM
Rsyocto🤖 SoCFPGA: Open Source embedded Linux developed for Intel (ALTERA) SoC-FPGAs (Cyclone V & Arria 10)
Mips CpuA MIPS CPU implemented in Verilog
Pano z80Retro Z80 computer for the Pano Logic Thin Client
Higan VerilogThis is a higan/Verilator co-simulation example/framework
Icestudio❄️ Visual editor for open FPGA boards
IrohaIntermediate Representation Of Hardware Abstraction (LLVM-ish for HLS)
ZbasicA bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
Lxp32 CpuA lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set
Autooffload.jlAutomatic GPU, TPU, FPGA, Xeon Phi, Multithreaded, Distributed, etc. offloading for scientific machine learning (SciML) and differential equations
AesAES-128 hardware implementation
TenyrSimple, orthogonal 32-bit computer architecture and environment
AudioxtreamerASIO driver, Usb Driver, FX2LP Firmware, VHDL Fpga, Schematics & PCB Layout for the AudioXtreamer, a USB 2.0 32ch Audio/Midi interface for retrofitting into digital mixers/interfaces.
PipecnnAn OpenCL-based FPGA Accelerator for Convolutional Neural Networks
HdlHDL libraries and projects
Platformio Vscode IdePlatformIO IDE for VSCode: The next generation integrated development environment for IoT
Paddle LiteMulti-platform high performance deep learning inference engine (『飞桨』多平台高性能深度学习预测引擎)
ZipcpuA small, light weight, RISC CPU soft core
FusesocPackage manager and build abstraction tool for FPGA/ASIC development
Platformio CorePlatformIO is a professional collaborative platform for embedded development 👽 A place where Developers and Teams have true Freedom! No more vendor lock-in!
UhdThe USRP™ Hardware Driver Repository
HdmiSend video/audio over HDMI on an FPGA
JohnJohn the Ripper jumbo - advanced offline password cracker, which supports hundreds of hash and cipher types, and runs on many operating systems, CPUs, GPUs, and even some FPGAs
NmigenA refreshed Python toolbox for building complex digital hardware
Embedded Neural Network collection of works aiming at reducing model sizes or the ASIC/FPGA accelerator for machine learning
PrjxrayDocumenting the Xilinx 7-series bit-stream format.
TornadovmTornadoVM: A practical and efficient heterogeneous programming framework for managed languages
Platformio Atom IdePlatformIO IDE for Atom: The next generation integrated development environment for IoT
Hls4mlMachine learning in FPGAs using HLS
SiliceSilice is an open source language that simplifies prototyping and writing algorithms on FPGA architectures.
VunitVUnit is a unit testing framework for VHDL/SystemVerilog
Dsp TheoryTheory of digital signal processing (DSP): signals, filtration (IIR, FIR, CIC, MAF), transforms (FFT, DFT, Hilbert, Z-transform) etc.
Nontrivial MipsNonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.
FiresimFireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation in the Cloud
CascadeA Just-In-Time Compiler for Verilog from VMware Research